Applications

SiC & GaN power devices

The power market has moved from a race for capacity to a race for yield, cost and 8-inch maturity. That shifts the equipment question: not “who can etch SiC”, but “who can hit your trench profile, damage budget and repeatability at production volume”.

The process challenges that recur

Hard materials, exact profiles

SiC trench geometry — angle, corner rounding, surface quality — feeds directly into device performance and reliability. Small profile drift becomes parametric drift.

Damage you cannot see immediately

GaN and AlGaN layers punish aggressive etching with subsurface damage that only shows up in device data. Low-damage process windows must be proven, not assumed.

Films under thermal constraint

Passivation and interlayer dielectrics must deliver breakdown strength and stability within the thermal budget of the finished stack.

Typical process steps we support

  • SiC trench and mesa etch
  • GaN / AlGaN low-damage etch
  • SiN and SiO₂ passivation PECVD
  • High-temperature oxidation, anneal and diffusion
  • Backside and via processing

How we help

Validate against your structures

Demo plans built around your trench geometry and damage criteria — with the metrology to prove the result, agreed in advance.

Support the 6-to-8-inch transition

Wafer-size migration re-opens every process assumption. We help structure the re-qualification so it is a plan, not a scramble.

Balance imported and local options honestly

Where a local solution genuinely fits, we say so. Our value concentrates where profile control, damage or repeatability requirements are hard to meet.

What to prepare for a first discussion

  • Device structure and voltage class
  • Substrate: SiC / GaN-on-Si / GaN-on-sapphire, wafer size
  • Trench or mesa geometry and tolerance
  • Damage and surface-quality criteria
  • Current process and its failure mode
  • Production timeline and volume

Discuss your process

Have a structure, film or thermal step to discuss?

Send a short description of your application — device type, material, wafer size and what a good result looks like. An engineer will reply with a concrete next step.

Start the conversation